cpu-dispatch escapes any specified baseline features and also escapesĪny features not supported by the target platform or compiler without raisingĮventually, you should always check the final report through the build log py build - cpu - baseline = ssse3, sse41, sse42, avx, avx2, fma3 py build - cpu - dispatch = avx2, fma3 # Dispatches AVX and SSE features python setup. # Only dispatches AVX2 and FMA3 python setup. Operators-/+: remove or add features, useful with options MAX, MIN and NATIVE.ĬPU features and other options are case-insensitive, for example: MAX: Enables all supported CPU features by the compiler and platform. MIN: Enables the minimum CPU features that can safely run on a wide range of platforms: This operation is based on the compiler flags ( -march=native, -xHost, /QxHost) NATIVE: Enables all CPU features that supported by the host CPU, SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 AVX512F AVX512CD AVX512_SKX AVX512_CLX AVX512_CNL AVX512_ICL SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 AVX512F AVX512CD AVX512_SKX AVX512_CLX AVX512_CNL SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 AVX512F AVX512CD AVX512_SKX

SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 AVX512F AVX512CD AVX512_KNLĪVX5124FMAPS AVX5124VNNIW AVX512VPOPCNTDQ SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 AVX512F AVX512CD SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 AVX512F SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C FMA3 AVX2 SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX F16C SSE SSE2 SSE3 SSSE3 SSE41 POPCNT SSE42 AVX

See Platform differences for more details. When it comes to features like AVX512, AVX2, and FMA3. The following features may not be supported by all compilers,Īlso some compilers may produce different set of implied features

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